摘要:在現代電子系統中，諸如通訊、視頻和圖像處理等系統中都要求對信號處理要有實時性和靈活性，而現有的DSP處理器難以同時達到這兩方面的要求。隨著可編程邏輯器件和EDA技術的發展，FPGA在性能、成本、靈活性和功耗等方面的優勢都突顯出來，基于FPGA的信號處理器已廣泛應用于各種信號處理領域。

　　　本文首先分析了IIR數字濾波器的原理及設計方法，接下來介紹了FPGA的相關理論知識。在相關理論知識熟悉的前提下，通過QUARTUSⅡ的設計平臺，采用自頂向下的模塊化設計思想將整個IIR數字濾波器分為：時序控制、延時、補碼乘加和累加四個功能模塊。分別對各模塊采用VHDL進行描述后，進行了仿真和綜合。最后對IIR數字濾波器進行了仿真與分析，結果表明，本課題所設計的IIR數字濾波器運算速度較快,系數改變靈活，有較好的參考價值。

關鍵詞：電子設計自動化 IIR數字濾波器 現場可編程門陣列 硬件描述語言

ABSTRACT:In modern electronic systems, such as communications, video and image processing in the system require has a real-time signal processing and flexibility, while the existing DSP processor is difficult to meet both requirements. With the development of programmable logic devices and EDA technology, FPGA in such aspects as performance, cost, flexibility and power advantages are highlighted, signal processor based on FPGA has been widely used in all kinds of signal processing field. 

　　　Firstly，this paper analyzes the principle and the design of IIR digital filter method, then introduces the FPGA relevant theoretical knowledge. In the related theoretical knowledge under the premise of familiar, by QUARTUS Ⅱ design platform, adopting the top-down modular design thought the IIR digital filter can be divided into: sequential control, time delay, complement multiply and accumulate four function module. Separately for each module is described, using VHDL simulation and synthesis. Finally has carried on the simulation and analysis of IIR digital filter, the result shows that this topic designed IIR digital filter arithmetic speed faster, flexible coefficient change, has good reference value. 

Key words: Electronic design automation、 IIR digital filter 、field programmable gate array (fpga)、 hardware description language